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Espressif Systems /ESP32-P4 /SPI0 /SPI_MEM_CACHE_SCTRL

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Interpret as SPI_MEM_CACHE_SCTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SPI_MEM_CACHE_USR_SADDR_4BYTE)SPI_MEM_CACHE_USR_SADDR_4BYTE 0 (SPI_MEM_USR_SRAM_DIO)SPI_MEM_USR_SRAM_DIO 0 (SPI_MEM_USR_SRAM_QIO)SPI_MEM_USR_SRAM_QIO 0 (SPI_MEM_USR_WR_SRAM_DUMMY)SPI_MEM_USR_WR_SRAM_DUMMY 0 (SPI_MEM_USR_RD_SRAM_DUMMY)SPI_MEM_USR_RD_SRAM_DUMMY 0 (SPI_MEM_CACHE_SRAM_USR_RCMD)SPI_MEM_CACHE_SRAM_USR_RCMD 0SPI_MEM_SRAM_RDUMMY_CYCLELEN 0SPI_MEM_SRAM_ADDR_BITLEN 0 (SPI_MEM_CACHE_SRAM_USR_WCMD)SPI_MEM_CACHE_SRAM_USR_WCMD 0 (SPI_MEM_SRAM_OCT)SPI_MEM_SRAM_OCT 0SPI_MEM_SRAM_WDUMMY_CYCLELEN

Description

SPI0 external RAM control register

Fields

SPI_MEM_CACHE_USR_SADDR_4BYTE

For SPI0, In the external RAM mode, cache read flash with 4 bytes command, 1: enable, 0:disable.
SPI_MEM_USR_SRAM_DIO

For SPI0, In the external RAM mode, spi dual I/O mode enable, 1: enable, 0:disable
SPI_MEM_USR_SRAM_QIO

For SPI0, In the external RAM mode, spi quad I/O mode enable, 1: enable, 0:disable
SPI_MEM_USR_WR_SRAM_DUMMY

For SPI0, In the external RAM mode, it is the enable bit of dummy phase for write operations.
SPI_MEM_USR_RD_SRAM_DUMMY

For SPI0, In the external RAM mode, it is the enable bit of dummy phase for read operations.
SPI_MEM_CACHE_SRAM_USR_RCMD

For SPI0, In the external RAM mode cache read external RAM for user define command.
SPI_MEM_SRAM_RDUMMY_CYCLELEN

For SPI0, In the external RAM mode, it is the length in bits of read dummy phase. The register value shall be (bit_num-1).
SPI_MEM_SRAM_ADDR_BITLEN

For SPI0, In the external RAM mode, it is the length in bits of address phase. The register value shall be (bit_num-1).
SPI_MEM_CACHE_SRAM_USR_WCMD

For SPI0, In the external RAM mode cache write sram for user define command
SPI_MEM_SRAM_OCT

reserved
SPI_MEM_SRAM_WDUMMY_CYCLELEN

For SPI0, In the external RAM mode, it is the length in bits of write dummy phase. The register value shall be (bit_num-1).

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data